Architecture Choice
- Xilinx
- Altera
- Lattice
Course Contents
- HDL Training (Verilog / VHDL)
- Synthesizable HDL subset
- Testbench Creation / Functional Verification
- Logic Synthesis
- FPGA Implementation
- FPGA Constraints definition
- On-board Testing
Workshop Highlights
- Workshop by Professional with 15+ yrs industry experience
- Workshop on Entire Design cycle (Specification to Silicon)
- Exhaustive Sessions
- Single day or Multi-Day Workshops, Customized as per need
- Online workshop using web collaboration tools
Training Program Highlights
- Trainer with 15+ yrs industry experience
- Training on Entire Design cycle (Specification to Silicon)
- Exhaustive Practice sessions
- Online training using web collaboration tools
Training Delivery
- Offline: Pune, Maharashtra, India
- Online: Google Meet / Zoom / Webex / Skype
- Onsite: Customer Site