Course Contents
- Overview of VHDL Language & its use in digital logic design
- VHDL Constructs – For synthesis and Simulation / Modeling
- Build logic structures using VHDL
- Constructing a Hierarchical design using VHDL
- Simulation Vs Synthesis Environment
- Verification Concepts
- Testbench creation and design testing
- FPGA Logic Synthesis
- FPGA Floorplanning and Routing Concepts
- Realizing a design on FPGA and on-board testing
Workshop Highlights
- Workshop by Professional with 15+ yrs industry experience
- Workshop on Entire Design cycle (Specification to Silicon)
- Exhaustive Sessions
- Single day or Multi-Day Workshops, Customized as per need
- Online workshop using web collaboration tools
Training Program Highlights
- Trainer with 15+ yrs industry experience
- Training on Entire Design cycle (Specification to Silicon)
- Exhaustive Practice sessions
- Online training using web collaboration tools
Training Delivery
- Offline: Pune, Maharashtra, India
- Online: Google Meet / Zoom / Webex / Skype
- Onsite: Customer Site